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Subject: [2010-07-25] H-JTAG V1.1 RELEASE
twentyone
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#41
Post at 2008-11-10 19:57
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Sorry. H-Flasher currently doesn't support the programming of NAND flash.
borce_razor
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#42
Post at 2009-1-4 20:55
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Hi all. Happy new year. I have big problem with Intel XScale PXA312 processor (samsung omnia i900 phone). It's blocked in monahans state. Can somebody help how to repair it ? I have jtag pinout, but don't have jtag cable (I'll make it from simple lpt cable - if it's possible)
best regards
borce
twentyone
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#43
Post at 2009-1-6 02:18
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Sorry, H-JTAG doesn't support PXA300.
borce_razor
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#44
Post at 2009-1-16 01:35
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Why not supported ? Under Target settings is shown PXA30x, PXA31x and PXA32x or it's mistake ?
twentyone
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#45
Post at 2009-1-23 19:12
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it is a mistake. sorry
jcdzxh
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#46
Post at 2009-1-23 23:06
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Thank you very much !
amir.s.m
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#47
Post at 2009-1-28 17:08
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dear twentyone:
PXA30x and PXA31x use same CPU and instruction of these families is same,
with attempt to many developers compile their programs with PXA27x applications i think we must done Jtag for PXA31x series with H-jtag.
we must only have the processor ID ,
is this idea true?
twentyone
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#48
Post at 2009-1-30 09:58
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To amir.s.m
There are some other differences between PXA300 and PXA200, fox example, the IR (Jtag Instruction Register) length.
zhejye
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#49
Post at 2009-2-11 12:09
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why download?
lala625134072
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#50
Post at 2009-4-11 10:15
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no subject
Thank you,Iwant to use it
rainbow2009
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#51
Post at 2009-4-29 16:12
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Yeah. USe it and you'll never regret! Enjoy yourself
pret auto
[
Last edited by rainbow2009 at 2009-4-29 16:14
]
ingwar
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#52
Post at 2009-8-5 00:11
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ARM946e-s is not detected!
Previous v.0.9.1 detected ARM946e-s easily, but there was some problems with Samsung NAND flash K9K8G08U0A. The first message on this forum says:
...
> 3 - Added the support to the programming of NAND flash (Expandable)
...
so I've made upgrade. But now it even seems not to detect ID of the target with all the same tunings. Is it some cross version bug ?
Will I have any hope to get my flash chip supported if the core would be detected ?
Thanx.
twentyone
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#53
Post at 2009-8-10 07:09
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Please use 0.9.2 version. Under the installation folder, you can find the nand flash drivers source codes. C:\Program Files\H-JTAG\FDevice\NAND-FLASH\SourceCodes (ADS1.2).
You can write a new nand flash driver for your own hardware.
ingwar
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#54
Post at 2009-8-12 18:50
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to twentyone
Thank you, I've found driver sources. They go with Code Warrior projects, aren't they ? What version of this IDE should I look for ?
Please answer to the second part of my previous problem: why the v. 0.9.2 doesn't detect my SoC S5L2010 ID (ARM946E-S core), while v. 0.9.1 detects it without any problem ? Could I hope that this problem will be fixed sooner or later in the next update ? I'm using wiggler 2, nSRST is set inverted, nTRST is set to PIN6, nSRST is set to PIN2 (all settings is checked to be identical for both versions of H-JTAG).
Now I use H-JTAG v.0.9.1 with IAR v.5, but still there is some other problems: I can't set any breakpoint to the code after the code have been downloaded and core halted. The next messages appears in IAR log:
[RDI Error: 148] No more breakpoints left for this type of memory (RAM/ROM)
Wed Aug 12 13:08:32 2009: Failed to set breakpoint: Driver error.
Have You any ideas about that ?
Thanks in advance.
ingwar
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#55
Post at 2009-8-13 23:43
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Reply #54 ingwar's post
Problem with breakpoints has been solved partially: in the initial state Boot ROM is mapped from the 0 address and IAR seems not support breakpoints for such memory, but NoICE do this well. Other problems are still actual.
twentyone
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#56
Post at 2009-8-14 14:25
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QUOTE:
Originally posted by
ingwar
at 2009-8-12 18:50
Thank you, I've found driver sources. They go with Code Warrior projects, aren't they ? What version of this IDE should I look for ?
Please answer to the second part of my previous problem: why the v ...
1 - You should use ADS1.2 to compile the nand flash driver source code.
2 - Could you send me an email, I will send a test version to you for the detection issue.
My email address is
twentyone@hjtag.com
twentyone
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#57
Post at 2009-8-14 14:27
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QUOTE:
Originally posted by
ingwar
at 2009-8-13 23:43
Problem with breakpoints has been solved partially: in the initial state Boot ROM is mapped from the 0 address and IAR seems not support breakpoints for such memory, but NoICE do this well. Other prob ...
In ROM/FLASH, only two breakpoints are available. IAR will set an invisible breakpoint @0x8. that is why only one is available to user. This issue is solved in 0.9.2, but 0.9.2 doesn't work on your board.
By the way, please send me an email, I will give you a test version for testing. My email address is
twentyone@hjtag.com
.
ingwar
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#58
Post at 2009-8-18 19:55
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to twentyone:
I've sent You a letter some time ago, but still have no reply. Maybe it's been placed to spam folder ? Just in case here is my mail: ingwarid#yahoo.com, where # is @.
murphy86
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#59
Post at 2009-8-30 19:14
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I have problems with STM32F101C8T6, Programming with USB flasher MCU will be strange state, reset dose not work, only powerdown/up, and after flashing once with USB, H-Jtag is not able to connect any more.
Changed MCU twice, no help. After powerdown LPT wiggler will find and is able to eraseMCU. After erase USB flasher will find MCU.
Other similar boards with STM32F101T8U6 work fine.
ADC_DMA is not used.
I suspect delay between communication and reset, in other words resest is still active (pullup and cap slows down voltage rise) and flasher will try to connect.
LPT is slower an reset will be ok.
Allso how much current USB flasher reset pin can sink. In my application reset pin has traditional 1,5k and 100n circuit, if it can withstand 100-200ohm then I coult remove cap and still get low noise sensitivity.
diane09
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#60
Post at 2009-9-16 22:05
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Thanks for this. I'll be downloading.
Regards,
Diane
Pret travaux
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